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Back to basics: Understanding and mitigating the growing problem of distribution losses

There are many articles available describing how to overcome power distribution losses with suitable power conversion devices and architectures. This post goes back to basics: explaining the underlying issues of distribution losses and the principles of their solution.

If DC-DC converters and power conversion devices are any part of your working life, you will be aware of their key role in conducting electrical power from the edge of a printed circuit board (PCB) to its onboard components efficiently. You may also be aware of the Vicor Intermediate Bus Architecture (IBA) and Factorized Power Architecture and other technologies designed to maximize this efficiency. The objective is to minimize distribution losses as the power flows from the PCB connector to its onboard point of load.

However you may not be aware of the fundamentals – what causes distribution losses, why does advancing technology exacerbate their impact, and how do power devices and architectures work to mitigate this? We provide answers to these questions below as we explain the underlying problems that FPA and other power architectures are designed to solve.

Even with mitigating technologies, distribution losses – or, more definitively as we shall see, I²R losses – are an inevitable part of transmitting power from one place to another. This is equally true of mains power transmitted across the National Grid or of low voltage DC power applied to a PCB. The reason is that the conducting medium, whether it is an overhead cable or a PCB track, always has a finite resistance, and power is lost, or dissipated, in overcoming this resistance. The remaining power is dissipated by the device being supplied; a microprocessor chip, for example.

To understand more about the nature of electrical power dissipation, let’s start with Figure 1:

In Figure 1, a DC voltage (V) volts is being applied across a resistive load (R) ohms. The load is drawing a current (I) amps. At this point, we need to introduce a couple of formulae; however they’re the only two we have to understand. We can derive everything else from them.

Firstly, there’s Ohm’s Law, which says

Where V is the voltage applied across (say) a device, R is its resistance, and I is the current it draws. For a fixed voltage supply, we can see that the lower the device’s resistance, the more current it draws.

The other formula is Watt’s Law which states

This says that in Figure 1, the power (P) dissipated by the device is the product of the voltage (V) across it and the current (I) that it draws. Note that P depends equally on V and I. Note also that if a device takes, say, 100W, this could be delivered either as 100V @1A, or 1V @100A, or any other VI combination that multiplies out to 100. However in considering these variations we must not forget the device’s maximum input voltage rating.

At this point, let’s imagine that the device in Figure 1 is a microprocessor, and that it draws 100A @1V. These are not real figures, but they are representative of what could be expected from a desktop PC chip. From Ohm’s law we can see that it has an internal resistance of V/I = 1/100 = 0.01 Ohm. As we move from Figure 1 towards reality – but without yet giving ourselves the benefit of modern power train technology – we recognise that the chip’s 1V supply has to travel along copper tracks connecting the board’s power connector to the chip’s power pins. These copper tracks have a finite resistance. If they are 5mm wide and 5cm long this could be approximately 0.005 Ohms. Note that the track resistance is directly proportional to the track length. Figure 2 represents the electrical view of this scenario.